Regviz

Silicon Labs /SiM3_NRND /SIM3L168_A /SPI_0 /FSTATUS

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Interpret as FSTATUS

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Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/Silicon Labs/SiM3_NRND/SIM3L168_A/SPI_1/FSTATUS#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0RFRPTR0RFWPTR0TFRPTR0TFWPTR

Description

FIFO Status

Fields

RFRPTR

Receive FIFO Read Pointer.
RFWPTR

Receive FIFO Write Pointer.
TFRPTR

Transmit FIFO Read Pointer.
TFWPTR

Transmit FIFO Write Pointer.

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data